1. Field of the Invention
The present invention relates to a signal control device and a signal control method suitable for simultaneous access to, for example, a dual port RAM.
2. Description of the Related Art
In the past, a dual port RAM through which two CPUs gain access to data was used. However, when two different CPUs simultaneously attempted reading/writing access to the dual port RAM, data was sometimes not guaranteed to be read. For example, when access collision occurs between the writing and the reading of data to and from the dual port RAM, there is a danger in which the data is read during the rewriting of the data due to a difference between access timings of the respective ports. In this case, there is a possibility of reading an undefined value. For this reason, even when the two CPU simultaneously gain access to the dual port RAM, the following various countermeasures have been adopted in order to correctly read the data.
(1) The collision is avoided by determining timings so that the reading and the writing of the respective CPUs do not overlap with each other.
(2) One CPU awaits a reading operation while the other CPU outputs a busy signal or the like during the writing of data to the dual port RAM.
(3) The collision is avoided by preparing two pairs of dual port RAMs to distribute respective accesses and the details of the RAMs are merged when there is no bus access (Japanese Unexamined Utility Model Registration Application Publication No. 5-23263).
(4) Written data is latched (Japanese Unexamined Patent Application Publication No. 6-19832, Japanese Unexamined Patent Application Publication No. 4-313132, and Japanese Unexamined Patent Application Publication No. 3-292695).